1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device provided with a power transistor, such as a power MOSFET or power bipolar transistor, through which a large current is passed.
2. Description of the Prior Art
In a semiconductor integrated circuit device, such as a motor driver, that is provided with a power transistor through which a large current is passed to drive a load, there is usually provided, for the purpose of preventing the power transistor from being destroyed as a result of a current larger than the rated current flowing therethrough, a current detection circuit for detecting the current that flows through the power transistor or an overcurrent protection circuit. One type of such a current detection circuit or overcurrent protection circuit achieves current detection by the use of a resistor for current detection which is connected directly in the circuit that includes the power transistor.
In some applications, a semiconductor integrated circuit device provided with a power transistor is operated from a supply voltage as low as, for example, 5 V. In such a case, to secure a sufficiently wide dynamic range in the voltage fed to the load, it is necessary to minimize the voltage drop in the voltage fed to the load. Thus, considering the voltage drop across the resistor for current detection which is connected in series with the circuit including the power transistor, the circuit configuration described above is not fit for a semiconductor integrated circuit device that is operated from a low supply voltage.
As examples of prior-art techniques that employ a current detection circuit or overcurrent protection circuit in which the aforementioned voltage drop is reduced, Japanese Patent Applications Published Nos. H7-120221 and H8-34222 and Japanese Patent Applications Laid-Open Nos. 2002-16219, 2002-26707, and 2002-280886 propose power MOSFETs furnished with an overcurrent protection function wherein the power transistor is protected from overcurrent according to the current from a transistor whose drain and gate are kept at the same potentials as the drain and gate, respectively, of the power transistor. As another example of a prior-art technique, Japanese Patent Application Laid-Open No. H6-61432 proposes a semiconductor device wherein a power FET and a sense FET connected in parallel with the power FET are connected individually to the input terminals of an operational amplifier so that current detection is achieved by monitoring the potential difference between the output terminal of the operational amplifier and the input terminal of the sense FET.
In an overcurrent protection circuit or current detection circuit configured as proposed in Japanese Patent Applications Published Nos. H7-120221 and H8-34222 and Japanese Patent Applications Laid-Open Nos. 2002-16219, 2002-26707, and 2002-280886, the current through the power transistor is detected by detecting the current from the transistor whose drain and gate are kept at the same potentials as the drain and gate, respectively, of the power transistor. However, in this configuration, the sources of the two transistors are not forcibly kept at the same potential. Accordingly, the transistor for current detection and the power transistor do not operate in the perfectly identical state. Thus, it is not always possible to detect a current proportional to the current that flows through the power transistor.
On the other hand, in the semiconductor device proposed in Japanese Patent Application Laid-Open No. H6-61432, a resistor is connected between the inverting input terminal and output terminal of the operational amplifier, and therefore, even when the source current of the sense FET is outputted as a detection current from the inverting input terminal side of the operational amplifier, part of the source current of the sense FET flows through the resistor into the operational amplifier. Thus, the source current of the sense FET is not completely outputted, but varies according to the state in which it is operating. This necessitates adopting a configuration in which the current though the power FET is detected by detecting the difference between the voltage on the output terminal side of the operational amplifier and the voltage on the inverting input terminal side of the operational amplifier.
Furthermore, in this configuration, to pass the source current of the sense FET through the resistor connected between the output terminal and inverting input terminal of the operational amplifier, the inverting input terminal of the operational amplifier needs to be connected to a circuit stage into which no current flows from an input terminal of a comparator, operational amplifier, or the like. That is, it is necessary to provide a circuit functioning as a voltage amplification stage in the succeeding stage. Moreover, to output a current signal, this voltage amplification stage needs to be built as a voltage-to-current conversion stage.